The bundled simulator is taken from an entry-level or low-capacity edition, and bundled with the FPGA vendor's device libraries. In fact, most vendors include an OEM version of a third-party HDL simulator in their design suite. Pricing is not published publicly, but all three vendors are known to charge $25,000-$100,000 USD per seat, 1-year time-based license.įPGA vendors do not require expensive enterprise simulators for their design flow.
Although the customer is not required to perform any signoff checking, the tremendous cost of a wafer order has generally ensured thorough design-validation on the part of the customer.) The three major signoff-grade simulators include Cadence Incisive Enterprise Simulator, Mentor Modelsim/SE, and Synopsys VCS. ( Semiconductor foundries stipulate the usage of tools chosen from an approved list, in order for the customer's design to receive signoff status. The last point is critical for the ASIC tapeout process, when a design-database is released to manufacturing.
Additionally, limited-functionality editions of the Aldec and Modelsim simulator are downloadable free of charge, from their respective OEM partners (Actel, Altera, Lattice Semiconductor, Xilinx, etc.) For those desiring open-source software, there is Icarus Verilog, among others.īeyond the desktop level, enterprise-level simulators offer faster simulation runtime, more robust support for mixed-language ( VHDL and Verilog) simulation, and most importantly, are validated for timing-accurate (SDF-annotated) gate-level simulation. The suites bundle the simulator engine with a complete development environment: text editor, waveform viewer, and RTL-level browser. For desktop/personal use, Aldec, Mentor, LogicSim, SynaptiCAD, and others offer reasonably priced (<$5000 USD) tool-suites for the Windows 2000/XP platform.
Today, Verilog simulators are available from many vendors, at all price points. Verilog simulation software has come a long way since its early origin as a single proprietary product offered by one company.
Template:wikipedia list Verilog simulators are software packages that emulate the Verilog hardware description language.
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